I wonder if we'll eventually start seeing a trend for chips to shrink in size.
The existing Ampere chips are already massive (see previous STH videos etc), and most of that is because usually each time they double the number of cores, they usually double the number of memory lanes and IO lanes like PCI etc. But that's squashing ever more heat into a tiny (well, not so tiny with these chips) space.
I'm sure there are some good use cases where you might need that many cores on a single chip, like if there are lots of cache dependencies between all the threads, but I suspect the majority of these chips will end up carved up into smaller VMs and it seems to me that a multi-chip solution is probably more optimal for cooling and air flow.
I guess the counter argument is that chips designed using chiplets could still have a reasonable amount of space between each chiplet on the chip to allow each a greater cooling surface area and presenting one flat metal surface for cooling might perform better than several chips that potentially don't lie exactly co-planar.
At some point, with the current parallel buses, it'll become prohibitive to add more memory bandwidth to a socket. IBM did a lot of interesting things with OMI in their POWER 9 and 10 chips. These serial buses can reduce the pin count substantially.
That's not quite what I meant, because these are still just single chip machines.
I was specifically thinking of data centre use where more cores are obviously desirable, and in previous generations multi-chip designs were common e.g. dual-Xenon all the way up to I think quad-Xenon motherboards.
With the rise in core counts recently, most designs have gone back to single-CPU motherboards, but I wonder if we'll decide that 64, 128 or whatever cores per chip is enough, and just have more chips on a motherboard instead. Would give more flexibility for upgrades or replacing faulty CPUs, as well as probably being cheaper to make and easier to keep cool.
We can already do multiple 40GB/s interconnects from on-chip to outside the PC using PCIe/USB-C 3.2, so that kind of fast bus between separate chips on the same motherboard should be achievable for when you actually need cache sharing, and I suspect that with appropriate core-affinity settings, most jobs don't require all that much shared cache access.
You should try looking at any of AMD's server CPUs from the past four generations. They've been making chiplets of 8-16 CPU cores, with several chiplets per package to get much higher core counts than Intel, while still also supporting multiple CPU sockets.
> but I suspect the majority of these chips will end up carved up into smaller VMs
As someone who works with BSD Jails and preferably (though not as often) illumos Unix Zones, I look down my nose at those who would run VMs on these chips.
Yes, you can buy Ampere Altra systems; you can get a 128 core (2.6GHz) + mobo bundle for about $2.5k USD, and it should be "SystemReady" which is a fancy term for "boots generic UEFI images": https://www.newegg.com/asrock-rack-altrad8ud-1l2t-q64-22-amp...
Note that Altra is a years-old core at this point, Neoverse N1. For ST workloads you can much better with a more recent design. But it still has a high thread count w/o SMT, and is competitive enough at its power envelope to work great as a general server or CI runner or whatever (note the lower clock speeds.)
The AmpereOne line, though, which is their own custom design, and the basis of this new announcement -- is and has been unobtainium for mere mortals, despite the fact it's been shipping for a while. I don't even know of a single cloud provider offering it today. It's a tough market because vertically integrated suppliers like Google or Amazon are now developing their own ARM cores. It took a while for Altra to become consumer available though with options like that motherboard, so who knows what the timelines are for AmpereOne to hit consumer shelves.
"Air Cooled" shouldn't be a marketing feature here, I feel that all new data center compute should be liquid-cooled, it's much better for the environment as the cooling is more efficient (PUE).
I wonder how many watts it pulls at idle and under load. Given that it requires water-cooling, probably a lot. But the spec sheets claim 250w (not specifying load vs idle).
Supposedly the reference design from Ampere 128 core came water-cooled from the factory. Don't they go into data centers? Or did the give the reviewer a special version?
The existing Ampere chips are already massive (see previous STH videos etc), and most of that is because usually each time they double the number of cores, they usually double the number of memory lanes and IO lanes like PCI etc. But that's squashing ever more heat into a tiny (well, not so tiny with these chips) space.
I'm sure there are some good use cases where you might need that many cores on a single chip, like if there are lots of cache dependencies between all the threads, but I suspect the majority of these chips will end up carved up into smaller VMs and it seems to me that a multi-chip solution is probably more optimal for cooling and air flow.
I guess the counter argument is that chips designed using chiplets could still have a reasonable amount of space between each chiplet on the chip to allow each a greater cooling surface area and presenting one flat metal surface for cooling might perform better than several chips that potentially don't lie exactly co-planar.